Eecient Minarea Retiming of Large Level-clocked Circuits
نویسندگان
چکیده
Delay-constrained area optimization is an important step in synthesis of VLSI circuits. Minimum area (minarea) retiming is a powerful technique to solve this problem. The minarea retiming problem has been formulated as a linear program; in this work we present techniques for reducing the size of this linear program and e cient techniques for generating it. This results in an e cient minarea retiming method for large level-clocked circuits (with tens of thousands of gates).
منابع مشابه
Optimizing large multiphase level-clocked circuits
Retiming is a powerful technique for optimizing sequential circuits. The transparent nature of level sensitive latches enables level-clocked circuits to operate faster and require fewer memory elements than edge-triggered circuits. However, this transparency makes the operation of level-clocked circuits very complex, and optimization of level-clocked circuits is a di cult task. This work presen...
متن کاملEecient Retiming of Large Circuits
| Retiming, introduced by Leiserson and Saxe, is a powerful transformation of circuits that preserves functionality and improves performance. The ASTRA algorithm proposed an alternative view of retiming using the equivalence between retiming and clock skew optimization, and also presented a fast algorithm for minimum period (minperiod) retiming. Since minperiod retiming may signi cantly increas...
متن کاملEfficient retiming of large circuits
Retiming, introduced by Leiserson and Saxe, is a powerful transformation of circuits that preserves functionality and improves performance. The ASTRA algorithm proposed an alternative view of retiming using the equivalence between retiming and clock skew optimization and also presented a fast algorithm for minimum period (minperiod) retiming. Since minperiod retiming may significantly increase ...
متن کاملRetiming Level-Clocked Circuits for Latch Count Minimization
Retiming is a powerful transformation that can minimize the number of memory elements in a sequential circuit under clock period constraints. Recent research has led to the development of extremely fast algorithms for retiming edge-triggered circuits. However, level-clocked circuits have the potential to operate faster and require less memory elements than edgetriggered circuits. This paper add...
متن کاملThe Practical Application of Retiming to the Design of High - Performance Systems 1
Many advances have been made recently in the theory of circuit retiming, especially for circuits that use level-sensitive latches. In spite of this, automatic retiming tools have seen relatively little use in practice. One reason for this is the lack of good speedup results when retiming has been applied to real circuits. Another reason is that retiming has used a rather simple circuit model wh...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
دوره شماره
صفحات -
تاریخ انتشار 1997